A multi-core microprocessor (or chip-level multiprocessor, CMP) is one that combines two or more independent processors into a single package, often a single integrated circuit (IC). For example, a dual-core device contains two independent microprocessors and a quad-core device contains four microprocessors. A multi-core microprocessor implements multiprocessing in a single physical package. Cores in a multi-core device may share a single coherent cache at the highest on-device cache level or may have separate caches. The processors typically also share the same interconnect to the rest of the system. Each “core” independently implements optimizations such as superscalar execution, pipelining, and multithreading. A system with N cores is effective when it is presented with N or more threads concurrently.
On a multi-core system there needs to be a mechanism to efficiently schedule threads on the various cores. This challenge becomes even more complicated when thread affinity is taken into consideration as well. Thread affinity is where a thread is fixed to run on a particular core. Even if scheduling of threads with affinity is solved efficiently, scheduling of threads without affinity and choosing of the right thread for a particular core are further challenges to be overcome by designers.